These are two copies of schematic drawings I made. I have "painted" over them to show where the different parts of the ALU are. The top one makes the most sense, and my explanation follows it. The second schematic is a lot closer to how the actual circuit looks (if you stretched it out a bit), and I have traced the same things onto it because I find it interesting to see how it spread.


My apologies for the poor craftmanship, but it is good enough to serve the purpose. You can see the diagram is divided into three main sections, the Logical Unit (purple), the Decoder (blue), and the Full Adder (green). There is also the very "end" of the diagram, which remains uncolored, I'm tempted to include this in the Logical Unit but it's really just what you get when all the other parts are thrown together.
The ALU itself can find the result for one of four equations, depending on how it's set. They are "A and B", "A or B", "not-B", and "A + B". The control lines decide which of these to calculate, and if it's set to "A + B" the Carry In bit is added in as well, allowing multiple ALUs to be "strung" together to add bigger numbers. All the inputs can either be on or off (represented by logical 1 or 0), so a 1-bit ALU can only add 3 bits together at the most. That's including the Carry In. Each section of the ALU is responsible for handling a different part of this process.
The Logical Unit is where the equation solving is really done, even though it only uses six gates. If you look carefully, you can see that the left three calculate the answers to "A and B", "A or B" and "not-B". If addition was chosen as the equation, the work is done in the Full Adder. The right three gates of the Logical Unit kill the answers to any of the equations except the one that has been asked for. Which one that is, is determined by the Decoder.
The Decoder takes in the two control lines (C0 and C1) and decides which equation they're selecting. In this case:
0,0= A and B
0,1= A or B
1,0= not-B
1,1= A + B
You can see that the upper three sets of gates output to the Logical Unit, and determine which equations are killed and which is allowed to go on (if any). The other one goes to the Full Adder to tell it whether or not its answer should be displayed.
Finally comes the Full Adder. This section's output is used only if "A + B" is selected. The solver is actually a bit complicated, especially since I've used nothing but two-input ANDs, and ORs. It would look a lot simpler if I had not replaced the X-ORs and triple-input gates, but I wanted to make the ALU out of the most "basic" components I could (without actually making the transistors themselves :). It's a bit harder to trace what happens in this section because the wires criss-cross so much, but basically the upper left "cluster" adds A and B together, and if the answer is "2" it changes it to 0 (remember we're in binary, so the real answer should be "10"). The bottom area (connected to the Carry Out light) checks to see if the answer (including the Carry In) is greater than 1. If it is, the light is activated and the answer is "1x." The right section decides if the x is 1 or 0, by adding the result of the first cluster and the Carry In. If you look, you can see how if this is greater than 1 the bottom section is activated. If the least significant bit is a 1 then the light is activated, and the answer is "x1." The Carry Out light is placed next to the Output light to get the "total" answer.
That's it! A very brief explanation of how the ALU works. I hope it makes sense, it was really neat to assemble the thing itself. If you look below, you can see something that's a little closer to the actual circuit I produced. It's the same as the upper diagram, except that the gates are clustered together by type since the chips I was using came with multiple gates on them. My circuit is actually a line of the chips layed out, so the true circuit looked like the diagram below in one long row instead of two (the order was upper "cluster" (chip), lower, upper-one-to-the-right, lower, etc.). Go to the tour for pictures of the real thing.




return

[ardenstone]